下一代低功耗蓝牙系统芯片 (ART/212CP)

BLE SoC Architecture and System Design • Advanced RF transceiver architecture for low cost, low power and high performance • Optimized digital baseband algorithms for enhanced data throughput • System and modules specifications definition BLE Modules IP • Initial version of modules IP design in terms of circuit schematic, source code, netlist and simulation • Initial version modules including RF transceiver, digital baseband, control and interface logic, analog and digital peripherals etc • Refined modules IP design in terms of circuit schematic, source code, netlist and simulation • Refined modules including RF transceiver, digital baseband, control and interface logic, analog and digital peripherals etc • Protocol stack design including C codes and RTL codes BLE SoC • Initial version of BLE 4.2 SoC engineering samples • Refined version of BLE 4.2 SoC engineering samples Reference Design • Reference design for BLE 4.2 SoC to function and test in a platform