Project Title:
Visually Enhanced Ultra HD (VEUHD)
Project Reference:
ART/177CP
Project Period:
20140520 - 20160219
Funds Approved (HK$’000):
10933
Project Coordinator:
Mr Yiu-kei Li
Deputy Project Coordinator:
/
Deliverable:
a) VEUHD algorithm description b) Algorithm simulation models in C/Matlab c) System functional specification of VEUHD FPGA d) Micro architecture specifications e) FPGA hardware implementation Implementation in hardware description language (verilog) f) Performance evaluation system and evaluation report i) FPGA prototyping board ii) TV system with 4K panel for demonstration
Research Group:
Mr King Hung Chiu
Dr Luhong Liang
Mr Kenneth C. K. Lo
Mr Tim Ka Lung Wong
Mr Peter Cheng
Mr Peng Luo
Miss Xue Jiao Liu
Mr Chung Shui Chow
Mr Gordon Chung
Mr Gordon Yu
Mr Erik Qiu
Ms Rita Cheng
Mr Kwok Wai Hung
Mr Yat Hung, Patrick Kong
Mr Banghong, Band Chen
Mr Fangyao Chen
Mr Kwok Kwan Tong
Dr Mi Suen, Michelle Lee
Sponsor:
APW International Limited
Bio-Medical Engineering (HK) Limited
E-cloud Technology Holding Limited [Sponsor]
HiSilicon Technologies Co., Ltd.
Marvel Digital Limited [Sponsor]
Marvel Multi-dimensions Limited (licensing income) [Sponsor]
Description:
TV manufacturers worldwide are pushing 4KTV as a major generation upgrade. 2013 marked the first year 4KTV (Ultra-HD) became available to consumer markets. However, it is observed that generation upgrade of end user display hardware is usually ahead that of storage and broadcast infrastructure by 5-7 years. The world’s first, pilot 4K broadcast is planned in Japan in 2014. Mass broadcast of 4K contents will begin around 2020. Before Ultra-HD (UHD) contents become widely available, HD-to-UHD conversion is a must-have feature for all 4K TVs. Traditional 2D scaling fails to meet user expectations and Chinese TV makers need a good solution to compete. This industrial requirement will be addressed in this project. This project proposes innovative and patentable techniques that intelligently analyze Full HD (1920x1080) input based on human visual sensitivities and upgrade it to UHD with enhanced quality. The project also proposes to collaborate with Southeast University (SEU) through the National ASIC System Engineering Research Centre to develop techniques to reduce codec introduced artifacts. The algorithms from ASTRI and SEU will be integrated and implemented on an FPGA platform for commercialization. This project enables product differentiation for 4KTVs and helps promote generation upgrade. This project targets major Chinese TV makers and high end IPTV content providers. Some of them are already ASTRI’s partners who have indicated interest in this project. This project further strengthens ASTRI’s strategic position.
